Cognichip Raises $60M Series A to Rebuild Chip Design Around AI

Cognichip

has raised a

$60 million Series A round

led by

Seligman Ventures

, pushing its total funding to $93 million and signaling growing momentum behind a new category in semiconductor design: physics-informed AI. The round drew participation from SBI Investment and existing backers including

Mayfield

,

Lux Capital

,

FPV

, and

Candou Ventures

, with all seed investors increasing their positions.

The financing comes at a time when the semiconductor industry is facing structural limits. Designing advanced chips has become increasingly expensive and time-consuming, often requiring years and hundreds of millions of dollars, creating a bottleneck for AI progress itself.

A Shift Away from Incremental Design Tools

Cognichip is positioning itself not as another electronic design automation tool, but as a full-stack rethinking of how chips are designed. At the core is its

ACI® (Artificial Chip Intelligence)

platform.

According to Cognichip, ACI is a physics-informed foundation model built specifically for semiconductor design. Unlike general-purpose AI models, it integrates physical constraints, circuit behavior, and manufacturing realities directly into the model. This allows it to reason across the full chip development lifecycle, from architecture to verification and production.

The company claims this approach can reduce design effort by up to 75% and accelerate timelines by roughly 50%, fundamentally reshaping the economics of chip development.

Why Physics-Informed AI Matters

Traditional chip design is highly sequential, with engineers moving step-by-step through complex workflows. Cognichip’s approach introduces parallelism, enabling multiple design decisions to be explored simultaneously.

This matters because modern chips span digital, analog, and mixed-signal domains, with growing interdependencies that make optimization increasingly difficult. By embedding physics directly into the AI model, ACI can navigate these trade-offs in ways that purely data-driven systems cannot.

The result is a system that acts less like a tool and more like an engineering collaborator, capable of solving design problems with near designer-level reasoning.

Industry Veterans Signal Confidence

The round also brings heavyweight industry validation. Lip-Bu Tan and Umesh Padval have joined Cognichip’s board, reinforcing the view that AI-driven design is becoming a strategic priority across the semiconductor ecosystem.

Both executives have deep ties to the evolution of chip design infrastructure, including leadership roles in companies that defined earlier generations of design tools and silicon innovation. Their involvement suggests that the industry sees AI not as an incremental upgrade, but as a foundational shift.

From Tools to Infrastructure

Over the past two years, Cognichip has focused on building what it describes as one of the deepest datasets in semiconductor design, covering everything from circuit-level behavior to manufacturing constraints.

This data layer is critical. Chip design data is typically fragmented across tools, vendors, and proprietary environments, making it difficult to train generalized AI systems. Cognichip’s strategy is to unify these datasets into a governed system that can support large-scale model training and deployment.

This positions ACI as infrastructure rather than software—a layer that could sit across the entire semiconductor stack.

Early Enterprise Traction

The company is already working with more than 30 semiconductor firms, including many of the top players in the industry. These engagements span digital, analog, mixed-signal, and foundry environments, suggesting that the platform is being tested across real-world production workflows.

Early results reportedly show reductions in design cycles and costs while maintaining performance and manufacturability standards, which are critical for enterprise adoption.

One of the more interesting dynamics behind Cognichip’s rise is the circular dependency between AI and hardware. AI models require increasingly powerful chips, but those chips take years to design.

By compressing design timelines from months or years into potentially days, Cognichip is attempting to break that loop. If successful, this could accelerate not just semiconductor innovation, but the entire AI ecosystem that depends on it.

What Comes Next

Cognichip is moving into a phase centered on enterprise deployment, where the focus shifts from technical promise to consistent performance in production environments across the semiconductor industry.

If physics-informed AI can reliably reduce design timelines and costs at scale, it could alter how organizations approach chip development, potentially lowering barriers to custom silicon and expanding participation beyond traditional players.

More broadly, this points to a structural shift: chip design may evolve from a highly specialized, resource-intensive process into a more accessible and parallelized discipline, with implications for AI infrastructure, cloud computing, and edge systems.